The present invention generally relates to data transmission and more particularly to selectively providing pre-emphasis to data transmissions on a bus.
When data is transmitted from a source to a destination along a conductive path or bus, such as from a CPU or other integrated circuit chip to another circuit chip, data drivers are utilized to assert the data onto the bus. The requirements of a driver can vary significantly depending upon many factors including the speed in which the data is driven, the length of the bus between the source and the destination and the type of data transmission that is being carried out. If the source and destination are physically separated on a printed circuit board by a bus having a length that approaches three feet and the speed of operation is in the neighborhood of hundreds of megahertz (MHz), then a robust driver may be necessary to reliably communicate data from the source to the destination. However, more robust driver capability may require additional circuitry to implement and consume more power during operation. Given that a data bus may have up to 64 or more bit lines, such added circuitry required for driving each line may increase the cost of driver implementation as well as increase the power consumption of the integrated circuit. Moreover, circuit design may dictate that an implementation of driver architecture be uniform for a particular integrated circuit chip even though the chip may be used to transmit data onto busses having parameters that vary considerably depending upon the particular application. Circuit design simulation tools may be used to reliably determine whether transmission problems are likely in any particular application.
While it is possible to provide a uniform driver architecture that is intended for use in a multitude of applications, it is likely that some of the applications will require hard driving operation, which ultimately is likely to have damaging effects that in time will produce failure of the integrated circuit chip. Overdriving the receiver can also produce data reflections propagating back up the bus from the destination, as well as undesirable overshoot and undershoot conditions during data transitions between logic levels.